1. Field of the Invention
The present invention relates to a device for exchanging binary data between a multiplex of several time slots and a memory. For the present invention, "multiplex" means a transmission by time-division multiplex (TDM).
The present invention more specifically applies to such a device for transferring binary data between a multiplex of thirty-two time slots TS and a memory.
2. Discussion of the Related Art
Such a device is to be found, for example, on boards, called subscriber boards, of switch centers of a telecommunication network. These subscriber boards are especially meant for branching different transmissions which arrive on one or several incoming multiplexes towards one or several outgoing multiplexes. The data relative to the transmissions as well as the information required for their processing (for example, the transmission mode, the destination, etc.) thus only transit through these subscriber boards. A subscriber board includes a RAM for temporarily storing the digital information and, if necessary, the binary data relative to the transmissions. The subscriber board also includes a microprocessor for, in particular, controlling the exchanges between the different board components and, in particular, the acoesses to the memory. A transfer device to which the present invention applies can also be found, for example, in the sender-receiver of a group switching center of a telephone network.
The transmissions which transit through the subscriber boards can be of different types, that is, correspond to different rates and be coded according to different frames. All these transmissions are associated with digital information which enable the identification of all of their characteristics (type of transmission, destination, etc.) to ensure their adequate routing. A transmission channel includes, according to the transmission rate, one or several time slots TS of the multiplex. For example, on a multiplex with thirty-two time slots TS where each time slot TS contains an eight-bit word, a channel at 2.048 Mbits/s or thirty-two channels at 64 Kbits/s or, further, two-hundred and fifty-six channels at 8 Kbits/s can be formed. In practice, two of the thirty-two time slots TS of the multiplex are reserved, one for the synchronizing of the multiplex and the other for the transfer of a signaling relative to the thirty other time slots TS.
In conventional devices for binary data transfer between the multiplex and the memory, each time slot TS is associated with a High Level Data Link Controller (HDLC), and a Direct Memory Access Controller (DMAC). The function of these controllers is to enable processing of the information relative to the transmissions and to transfer them, for example, from an incoming multiplex to an outgoing multiplex, and conversely.
For example, for a multiplex of thirty-two time slots TS, thirty-two HDLCs and thirty-two DMACs are used, each time slot TS being associated with one HDLC and one DMAC. For example, in the presence of a transmission at 2 Mbits/s, all controllers are used for a same transmission channel occupying all the time slots TS of the multiplex. Conversely, for transmissions at 64 Kbits/s, one HDLC and one DMAC are assigned to each transmission channel. The bits transmitted by the HDLCs are multiplexed by time-division on a frame of the multiplex. The bits transmitted by an HDLC are always positioned in the same time slot TS of each frame of the multiplex.
The microprocessor has the function, in particular, to organize the exchanges between the different controllers and the RAM to enable the data transfer.